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fpga-accelerator

Here are 2 public repositories matching this topic...

dpretet / bster

Implementation of a binary search tree algorithm in a FPGA/ASIC IP

asic fpga ip verilog binary-tree systemverilog binary-trees bst fpga-accelerator bstree asic-design svut

Updated Sep 5, 2021
SystemVerilog

NikhilMukraj / spiking-neural-networks-hardware

An FPGA design for simulating biological neurons

neural-network computational-biology fpga-accelerator systemverilog-hdl izhikevich-neurons verilog-project biological-neurons

Updated Jul 5, 2024
SystemVerilog

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